What's New

The temporary score has been published, please contact with TA or me ASAP if you have any problem.

Syllabus

9/16	Introduction [PDF] [Print Version] Why and What is this course ? What is a computer ? Below your program Computer Hardware Digital Binary Systems -- tele-education READING: Chap. 1
9/23	Two-Level Combinational Logic [PDF] [Print Version] Logic Functions Gate Logic Two-Level Simplification READING: Chap. B.2, B.3 Homework #1 [PDF], deadline = 10/7
10/7	How to Program ? [HTML] [PDF] -- by TAs Homework #2 [PDF] [SPIM], deadline = 10/28
9/30 10/14	Instructions: Language of the Computer [PDF] [Print Version] Operations and Operands of the Computer Hardware Representing Instructions in the Computer Logical Operations Instructions for Making Decisions Supporting Procedures in Computer Hardware Communicating with People MIPS Addressing for 32-Bit Immediates and Addresses Translating and Starting a Program Arrays versus Pointers READING: Chap. 2 w/o 2.11~14, A.10
10/21 10/21 18:30-21:00 @MBA#1 Rm. 103	Arithmetic for Computers [PDF] [Print Version] Signed and Unsigned Numbers Addition and Subtraction Constructing a Basic Arithmetic Logic Unit Multiplication and Division Floating Point READING: Chap. 3, B.5
10/28	Assessing and Understanding Performance [PDF] [Print Version] CPU Performance and Its Factors Measuring Performance READING: Chap. 4 Homework #3 [PDF], deadline = 11/4
11/4	mid-term exam. range: the materials until 10/28
11/11 11/18 11/25	The Processor: Datapath and Control [PDF] [Print Version] Memory Elements Building a Datapath A Simple Implementation Scheme Finite State Machines A Multicycle Scheme Exceptions Microprogramming READING: Chap. 5 w/o 5.8, B.7, B.8, B.10, C.2~5 Homework #4 [PDF], deadline = 12/9
12/2	SKIP
12/9 12/16	Enhancing Performance with Pipelining [PDF] [Print Version] An Overview of Pipelining A Pipelined Datapath Pipelined Control Data Hazards and Forwarding Data Hazards and Stalls Branch Hazards READING: Chap. 6 w/o 6.7~9 Homework #5 [PDF], deadline = 12/30
12/16 until 13:10 12/23	Exploiting Memory Hierarchy [PDF] [Print Version] The Basic of Caches Measuring and Improving Cache Performance Virtual Memory A Common Framework for Memory Hierarchies READING: Chap. 7 w/o 7.4, 7.5
12/30	SKIP
1/6	final exam. range: the materials until 12/23

Textbook

• David A. Patterson and John L. Hennessy. Computer Organization and Design: The Hardware/Software Interface, 3rd. ed. , Morgan Kaufmann, 2004.

Reference

• John L. Hennessy and David A. Patterson. Computer Architecture: A Quantitative Approach, 4th ed. , Morgan Kaufmann, 2006.
  
• Randy H. Katz and G. Borriello. Contemporary Logic Design, 2nd ed. , Prentice Hall, 2004.

Grade Measurement

Homework (maybe five or six times with some small programs) + Examinations (twice or three times) + Participants

Pre-courses

Logic Design (Introduction to Computer)